p p js 64 1 5 ae april 29 ,201 5 - rev.0 1 page 1 2 0 v p - c hannel enhancement mode mosfet C esd protected voltage - 2 0 v current - 4.9 a sot - 23 6l - 1 unit : inch(mm) f eatures ? rds(on) , vgs@ - 10 v , id@ - 4.9 a< 60m ? ? rds(on) , vgs@ - 4.5 v, id@ - 4.2 a< 70m ? ? rds(on) , vgs@ - 2.5 v, id@ - 3.1 a< 96m ? ? advanced trench process technology ? specially designed for switch load, pwm application, etc ? esd protected 2kv hbm ? lead free in comply with eu rohs 20 11 / 6 5/e u directives. ? green molding compound as per iec61249 std. (h alogen free) mechanical data ? case: sot - 23 6l - 1 package ? terminals : solderable per mil - std - 750, method 2026 ? approx. weight: 0.0003 ounces, 0.0084 grams ? marking: s5e parameter symbol limit units drain - source voltage v ds - 20 v gate - source voltag e v gs + 12 v continuous drain current i d - 4.9 a pulsed drain current i dm - 19.6 a power dissipation t a =25 o c p d 2 w derate above 25 o c 1 6 m w/ o c operatin g junction an d storage temperature range t j ,t stg - 55~150 o c typical thermal resistance - j unction to ambient (note 3 ) r ja 62.5 o c /w maximum ratings and thermal characteristics (t a =25 o c unless otherwise noted)
p p js 64 1 5 ae april 29 ,201 5 - rev.0 1 page 2 e lectrical c haracteristics (t a =25 o c unless otherwise noted) parameter symbol test condition min. typ. max. units static drain - sou rce breakdown voltage bv dss v gs = 0 v, i d = - 25 0ua - 2 0 - - v gate threshold voltage v gs(th) v ds =v gs , i d = - 250 ua - 0.5 - 0.7 7 - 1.2 v drain - source on - state resistance r ds(on) v gs = - 10 v, i d = - 4.9 a - 50 6 0 m gs = - 4.5 v, i d = - 4.2 a - 58 70 v gs = - 2.5 v, i d = - 3.1 a - 80 9 6 v gs = - 1.8 v, i d = - 0.5 a - 140 180 zero gate voltage drain current i dss v ds = - 20 v, v gs =0v - - 0.01 - 1 u a gate - source leakage current i gss v gs = + 8 v, v ds =0v - + 6 + 10 u a dynamic (note 5 ) total gate charge q g v ds = - 10 v, i d = - 4.9 a, v gs = - 4.5v (note 1 , 2 ) - 6.9 - nc gate - source charge q gs - 1.5 - gate - drain charge q gd - 1.9 - input capacitance ciss v ds = - 10 v, v gs = 0 v, f=1.0mhz - 6 02 - pf output capacitance coss - 70 - reverse transfer capacitance crss - 47 - turn - on delay time t d (on) v dd = - 10 v, i d = - 4. 9 a, v g s = - 4.5v, r g = 3 (note 1 , 2 ) - 8.8 - ns turn - on rise time tr - 66 - turn - o ff delay time t d (off) - 29 - turn - o ff fall time tf - 14 - drain - source diode maximum continuous drain - source diode forward current i s --- - - - 1.5 a diode forward vo ltage v sd i s = - 1.0 a, v gs = 0 v - 0.79 - 1.0 v notes : 1. pulse width < 300us, duty cycle < 2% 2. essentially independent of operating temperature typical characteristics . 3. r ? ja is the sum of the junction - to - case and case - to - ambient thermal resistance where the case ther mal reference is defined as the solder mounting surface of the drain pins m ounted on a 1 inch fr - 4 with 2oz . square pad of copper 4. the maximum current rating is package limited 5. guaranteed by design, not subject to product ion testing
p p js 64 1 5 ae april 29 ,201 5 - rev.0 1 page 3 t ypical characteris tic curves fig.1 on - region characteristics fig. 2 transfer characteristics fig. 3 on - resistance vs. drain current fig. 4 on - resistance vs. junction temperature fig. 5 on - resistance variation with vgs. fig. 6 body d i ode characte ristics
p p js 64 1 5 ae april 29 ,201 5 - rev.0 1 page 4 t ypical characteristic curves fig. 7 gate - charge characteristics fig. 8 threshold voltage variation with temperature . fig. 9 capacitance vs. drain - source voltage .
p p js 64 1 5 ae april 29 ,201 5 - rev.0 1 page 5 part no packing code version mounting pad layout part no packing code p ackage type packing type marking ver sion PJS6415AE_s1_00001 sot - 23 6l - 1 3k pcs / 7
p p js 64 1 5 ae april 29 ,201 5 - rev.0 1 page 6 disclaimer
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